Virtual prototyping solutions enable designers to quickly develop fully functional virtual prototypes of complex, multi-core SoCs with moderate effort and minimal risk.
With the high level of integration of CPUs, GPUs, and DSPs in today’s System-on-Chip (SoC) and ASIC devices, software is becoming a primary driver of system innovation. This, along with the increasing pressure to reduce system development time, makes it critical to get a working hardware prototype into the hands of the various software teams as quickly as possible. Traditional prototyping methods using FPGAs or emulation systems can be used, but they can require major development efforts by themselves and can be very expensive to replicate. Virtual prototyping is an alternative, and in some cases complementary, prototyping methodology that can meet the needs of software developers, while requiring less development effort and expense.
Virtual prototyping brings three key benefits:
- Faster time-to-software-development;
- Improved software quality, and
- Lower development costs.
The term “virtual prototype” implies a software executable model of the hardware system that is written at a higher abstraction level than RTL. It also implies a high degree of functional accuracy, with functional equivalency being the goal for a software development environment. Cycle-accuracy is not typically required since the primary goal is to enable software development rather than system performance analysis. A CPU instruction set simulator is a good example of a virtual prototype. However, the scope here includes the entire SoC, and for this discussion implies high-end, CPU-based SoCs targeted towards the network, computing, and storage markets.
Virtual prototyping is not a new addition to the SoC design flow. For many years now, semiconductor ASSP companies have used in-house or proprietary virtual platforms to develop firmware and software in the early stages of the design cycle to reduce time-to-market. It is only in the last couple of years, however, that we are starting to see virtual prototyping tools become mainstream, allowing ASIC design houses to adopt them and make them an integral part of SoC design. A variety of third-party EDA vendors offer standalone virtual prototyping tools and, in most cases, are also integrating them into their overall EDA tool flow. These EDA vendors provide a rich portfolio of IP models that can span both functional and cycle-accurate needs. At the same time, these vendors are continuously adding new features to their implementation tools and making them very user friendly. Investing in the right virtual prototyping tool requires a good understanding of the tool’s features, availability of IP models, ability to easily create models from scratch or from golden RTL and ease-of-use within the SoC design flow.
Virtual prototyping solutions enable designers to quickly develop fully functional virtual prototypes of complex, multi-core SoCs with moderate effort and minimal risk. It is now possible to move from a whiteboard SoC specification to a working prototype for software developers to use in a matter of weeks. Moreover, softwarequalitycan be improved because virtual prototyping systems can allow more lengthy, automated testing of software. In some cases, modern prototyping systems can even be designed to run faster than the systems they are simulating. Granted, a software executable version at any abstraction level will execute slower than a hardware prototype, but the current technology can enable early software development tasks such as boot code, silicon validation support code, hardware drivers, and even OS bring-up. Once the virtual prototype is developed and working, it can be replicated as many times as required to support a large software development team. The only expenses incurred are those associated with the computing platforms to run the prototypes and simulation run-time licenses. Compared to full-up FPGA prototyping, these expenses are minimal.
As with any complex SoC design issue, virtual prototyping is not a one-size-fits-all solution. The system designer must take into consideration the complexity of the SoC, how much software can be developed on the prototype, the size of the software design team, and the overall development schedule before deciding on what type of prototyping system will provide the best return on investment. When considering outside design advice, system designers should partner with companies that have completed a number of SoC designs using both FPGA prototypes and virtual prototypes. Experience with these types of designs is required to ensure the most efficient path to functional software on silicon.
Sometimes a combination of both virtual prototyping and FPGA prototyping is desired to meet the software team’s requirements. On the other hand, there are times when just virtual prototyping, done right, is sufficient. In some cases, it is possible to meet low-level firmware development goals using a virtual prototype, and eliminate the need for a FPGA prototype altogether. To do so requires the development of certain memory models (e.g. NOR, NAND and SD/eMMC) from scratch, which can then emulate certain features in a way similar to a FPGA platform. Still, FPGA prototypes can be used to further enhance the software stack initially developed on a virtual prototype.
We are now seeing that virtual prototyping in a SoC design flow, especially for software, has already moved from a nice-to-have to a must-have. In terms of schedule, we can expect at least a 2 to 3 month reduction in development time when using virtual prototyping for software. Considering a typical 18 to 24 month schedule for a spec to software-on-SoC, this could significantly impact time-to-market. As a result, successful ASIC design will require the use of virtual prototyping platforms that enable faster software development, improved software quality and reduced time-to-market.